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NAME | SYNOPSIS | DESCRIPTION | MODIFIERS | OFFCORE_RESPONSE events | AUTHORS | COLOPHON |
LIBPFM(3) Linux Programmer's Manual LIBPFM(3)
libpfm_intel_hsw - support for Intel Haswell core PMU
#include <perfmon/pfmlib.h>
PMU name: hsw
PMU desc: Intel Haswell
PMU name: hsw_ep
PMU desc: Intel Haswell-EP
The library supports the Intel Haswell and Haswell-EP core PMU. It
should be noted that this PMU model only covers each core's PMU and
not the socket level PMU.
On Haswell, the number of generic counters depends on the
Hyperthreading (HT) mode. When HT is on, then only 4 generic
counters are available. When HT is off, then 8 generic counters are
available. The pfm_get_pmu_info() function returns the maximum number
of generic counters in num_cntrs.
The following modifiers are supported on Intel Haswell processors:
u Measure at user level which includes privilege levels 1, 2, 3.
This corresponds to PFM_PLM3. This is a boolean modifier.
k Measure at kernel level which includes privilege level 0. This
corresponds to PFM_PLM0. This is a boolean modifier.
i Invert the meaning of the event. The counter will now count
cycles in which the event is not occurring. This is a boolean
modifier
e Enable edge detection, i.e., count only when there is a state
transition from no occurrence of the event to at least one
occurrence. This modifier must be combined with a counter mask
modifier (m) with a value greater or equal to one. This is a
boolean modifier.
c Set the counter mask value. The mask acts as a threshold. The
counter will count the number of cycles in which the number of
occurrences of the event is greater or equal to the threshold.
This is an integer modifier with values in the range [0:255].
t Measure on both threads at the same time assuming hyper-
threading is enabled. This is a boolean modifier.
ldlat Pass a latency threshold to the MEM_TRANS_RETIRED:LOAD_LATENCY
event. This is an integer attribute that must be in the range
[3:65535]. It is required for this event. Note that the event
must be used with precise sampling (PEBS).
intx Monitor the event only when executing inside a transactional
memory region (in tx). Event does not count otherwise. This is
a boolean modifiers. Default value is 0.
intxcp Do not count occurrences of the event when they are inside an
aborted transactional memory region. This is a boolean
modifier. Default value is 0.
Intel Haswell provides two offcore_response events. They are called
OFFCORE_RESPONSE_0 and OFFCORE_RESPONSE_1.
Those events need special treatment in the performance monitoring
infrastructure because each event uses an extra register to store
some settings. Thus, in case multiple offcore_response events are
monitored simultaneously, the kernel needs to manage the sharing of
that extra register.
The offcore_response events are exposed as a normal events by the
library. The extra settings are exposed as regular umasks. The
library takes care of encoding the events according to the underlying
kernel interface.
On Intel Haswell, the umasks are divided into three categories:
request, supplier and snoop. The user must provide at least one umask
for each category. The categories are shown in the umask
descriptions.
There is also the special response umask called ANY_RESPONSE. When
this umask is used then it overrides any supplier and snoop umasks.
In other words, users can specify either ANY_RESPONSE OR any
combinations of supplier + snoops.
In case no supplier or snoop is specified, the library defaults to
using ANY_RESPONSE.
For instance, the following are valid event selections:
OFFCORE_RESPONSE_0:DMND_DATA_RD:ANY_RESPONSE
OFFCORE_RESPONSE_0:ANY_REQUEST
OFFCORE_RESPONSE_0:ANY_RFO:LLC_HITM:SNOOP_ANY
But the following are illegal:
OFFCORE_RESPONSE_0:ANY_RFO:LLC_HITM:ANY_RESPONSE
OFFCORE_RESPONSE_0:ANY_RFO:LLC_HITM:SNOOP_ANY:ANY_RESPONSE
Stephane Eranian <eranian@gmail.com>
This page is part of the perfmon2 (a performance monitoring library)
project. Information about the project can be found at
⟨http://perfmon2.sourceforge.net/⟩. If you have a bug report for this
manual page, send it to perfmon2-devel@lists.sourceforge.net. This
page was obtained from the project's upstream Git repository
⟨git://git.code.sf.net/p/perfmon2/libpfm4⟩ on 2017-07-05. If you dis‐
cover any rendering problems in this HTML version of the page, or you
believe there is a better or more up-to-date source for the page, or
you have corrections or improvements to the information in this
COLOPHON (which is not part of the original manual page), send a mail
to man-pages@man7.org
April, 2013 LIBPFM(3)